j-k flip-flop

英 [dʒeɪ keɪ flɪp flɒp]

美 [dʒeɪ keɪ flɪp flɑːp]

网络 jk触发器

Talking about the Differences between Master-slaver Mode J-K Flip-flop and Edge J-K Flip-flop
谈主从式J-K触发器与边沿式J-K触发器的区别
This paper introduces the main differences between the master-slaver mode J-K flip-flop and the edge J-K flip-flop from aspects of the concept, and sequence diagrams, etc., and analyzes on that under what kind of special working condition, the two flip-flops will have the identical function.
从概念到时序图等几个方面介绍了主从式J-K触发器与边沿式J-K触发器的主要区别，并分析了两者在何种特定的工作条件下，功能才会相同。
In the paper the first truth table of J-K flip-flop for the 2~ 3-valued logical system is presented followed by a logical network design which facilitates a further application to 2~ 3-valued discrete numerical system, such as data processing and information transmission etc.
为此，文中首次提出2~3值逻辑系统的J&K型触发器的真值表，并作出了它的逻辑网络设计，从而便于应用到2~3值离散数字系统中的数据处理与信号变换等。